1. Field of the Invention
The present invention relates to digital trimming for frequency adjustment for correcting a temporal shift of a time reference signal with regard to absolute time. More particularly, the digital trimming to correct the temporal shift of the time reference signal is performed in an IC (integrated circuit) used in a watch.
2. Description of Related Art
In an IC used in a watch, for instance, digital trimming methods have been used to correct a temporal shift of a time reference signal output from an oscillator circuit with regard to absolute time. One type of digital trimming method uses a frequency-divided signal functioning as the time reference signal. Another type of digital trimming method uses a fundamental signal that is expanded/compressed only by a required correction amount (digital trimming amount) at a predetermined correction period (digital trimming period).
In FIG. 13, a digital trimming circuit employing a conventional digital trimming method is shown. This digital trimming circuit includes an oscillator circuit 10 oscillated at a frequency of 32 KHz as a basic oscillation. A variable frequency dividing circuit 20 is connected to the output of the oscillator circuit 10. The variable frequency dividing circuit 20 uses 1/2-frequency dividers 22, 24 and 26 which each have data set functions. A frequency dividing circuit 30 generates a time reference signal S.sub.T from the output of the variable frequency dividing circuit 20. A digital trimming period forming circuit 40 generates a digital trimming period signal S.sub.F based on the signal from the frequency dividing circuit 30. The digital trimming circuit further includes a digital trimming execution timing signal forming circuit 50 for generating a digital trimming timing signal VCW based upon the digital trimming period signal S.sub.F and the basic oscillation clock f.sub.0 having the frequency of 32 KHz. Correction data supplying means 60 supplies, for example, a 3-bit correction data (CBA).sub.2 to a frequency division rate setting circuit 70. When the digital trimming execution timing signal VCW has been generated, the frequency division rate setting circuit 70 transfers the correction data (CBA).sub.2 to the respective set inputs "S" of the 1/2-frequency dividers 22, 24, 26. The correction data in position "A" is transferred to the set input of the 1/2-frequency divider 22. The correction data in position "B" is transferred to the set input of the 1/2-frequency divider 24. The correction data in position "C" is transferred to the set input of the 1/2-frequency divider 26.
The digital trimming execution timing signal forming circuit 50 is constructed of a latch 52 and a NOR gate 54. The latch 52 receives the digital trimming period signal S.sub.F as the data input "D" when the clock input CL is under a high level (hereinafter referred to as an "H" level). The latch 52 transfers this data input to the invert output XM, and maintains the invert output XM when the clock input CL is under a low level (hereinafter referred to as an "L" level). The NOR gate 54 receives as an input the digital trimming period signal S.sub.F and the invert output XM.
The frequency dividing ratio setting circuit 70 has three AND gates 72, 74 and 76. Each AND gate receives the VCW signal and one of the bits from the 3-bit correction data (CBA).sub.2.
Normally, the time period "T" of the digital trimming period signal S.sub.F is a relatively long time period defined from several seconds to several hundred seconds. As shown in FIG. 14, the digital trimming period signal S.sub.F is obtained by frequency dividing the output signal (4 KHz) of the 1/2-frequency divider 26 by the frequency dividing circuit 30. When the signal level of this digital trimming period signal S.sub.F is changed from the "H" level into the "L" level, all of the frequency signals, 32 KHz-signal, 16 KHz-signal, 8 KHz-signal, and 4 KHz-signal, are in the "L" state. Before S.sub.F changes state, the signal level of the digital trimming period signal S.sub.F and the signal level of the original oscillation clock f.sub.0 as the clock input CL are in the "H" state, and the signal level of the invert output XM of the latch 52 is in the "L" state. Then the digital trimming period signal S.sub.F changes from the "H" level to the "L" level. After this change of states and during a t/2 time period (1/2 time period) where the basic oscillation clock f.sub.0 is under the "L" level, the signal level of the invert output XM is maintained at the "L" state. As a consequence, the digital trimming execution timing signal VCW with the "H" level is produced over the 1/2 time period.
When the signal state of the digital trimming timing signal VCW is at the "H" level, and the correction data (CBA).sub.2 is (011).sub.2, for example, the content of the variable frequency circuit 20 is set to the condition of the point "P" during this t/2 time period. If, for example, the correction data (CBA).sub.2 is (111).sub.2, then the content of the variable frequency dividing circuit 20 is set to the condition of the point "Q" during this t/2 time period. As a result, when the variable frequency dividing circuit 20 is set to the point P, the period reference signal S.sub.T is shortened by a digital trimming amount T.sub.p =(1/32 KHz).times.3=92 microseconds with respect to the digital trimming time period. Also, when the variable frequency dividing circuit 20 is set to the point Q, the period reference signal S.sub.T is shortened by a digital trimming amount T.sub.Q =(1/32 KHz).times.7=214 microseconds with regard to the digital trimming time period.
In this example and in the preferred embodiments, the correction data is 3-bit data to make the circuits simpler. However, the correction data can be any number of bits and is usually on the order of 5 bits. When a 5-bit correction data is used, the maximum digital trimming amount reaches 0.98 milliseconds.
In general, assume that a number of bits in the correction data is selected to be "K," a digital trimming amount .DELTA.T is given by the following equation: EQU .DELTA.T=K.times.t (1)
For example, in the case of an N-bit correction data, the correction data value "K" is 0 through 2.sup.N -1. Therefore, the digital trimming rate ".eta." corresponding to the digital trimming amount within a unit time is given by the following formula: EQU .eta.=.DELTA.T/T=k.times.t/T (2)
Also, the digital trimming solution ".mu." corresponding to the minimum digital trimming rate is given by the following equation: EQU .mu.=t/T (3)
The above-described digital trimming apparatus suffers from the following problems, especially if the apparatus is used in a watch which has motor drive pulse outputs or an acoustic output. With respect to the period reference signal S.sub.T, the necessary digital trimming amount .DELTA.T has been performed during every time digital trimming time period T. If the digital trimming amount .DELTA.T becomes large, then the period reference signal S.sub.T is considerably expanded/compressed at a time instant when the digital trimming operation is executed. As a result, if the motor drive pulse output and the acoustic output happened to be superimposed at the digital trimming timing, the waveforms of the respective output pulses would be changed. This waveform change may cause a deterioration in the stability of the operation of the motor drive or an interruption in the acoustic outputs. In order to avoid this problem, the digital trimming timings are shifted from the timings of the motor drive pulse outputs and the acoustic outputs.
This solution may not always solve the problem. There are long periods of "unknown" time if a watch has a chronograph function in which a motor must be rotated at a fast time period for a long time. Long periods of time may be created if a multi-hand/multi-motor watch, which uses a plurality of motors, are controlled in an asynchronous mode. Also, a watch may have a melody output function in which an acoustic output is continued for a long time. In these situations, the digital trimming timing cannot be shifted; however, the digital trimming operations should be interrupted. Therefore, the time reference signal may drift from the original time reference signal during these long interrupt time periods.